108 lines
4.1 KiB
C++
108 lines
4.1 KiB
C++
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions
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// are met:
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// * Redistributions of source code must retain the above copyright
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// notice, this list of conditions and the following disclaimer.
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// * Redistributions in binary form must reproduce the above copyright
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// notice, this list of conditions and the following disclaimer in the
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// documentation and/or other materials provided with the distribution.
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// * Neither the name of NVIDIA CORPORATION nor the names of its
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// contributors may be used to endorse or promote products derived
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// from this software without specific prior written permission.
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS ''AS IS'' AND ANY
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// EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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// PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
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// CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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// EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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// PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
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// PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
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// OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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//
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// Copyright (c) 2008-2025 NVIDIA Corporation. All rights reserved.
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// Copyright (c) 2004-2008 AGEIA Technologies, Inc. All rights reserved.
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// Copyright (c) 2001-2004 NovodeX AG. All rights reserved.
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#include "foundation/PxFPU.h"
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#if !defined(__CYGWIN__)
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#include <fenv.h>
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PX_COMPILE_TIME_ASSERT(8 * sizeof(uint32_t) >= sizeof(fenv_t));
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#endif
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#if PX_OSX
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// osx defines SIMD as standard for floating point operations.
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#include <xmmintrin.h>
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#endif
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physx::PxFPUGuard::PxFPUGuard()
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{
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#if defined(__CYGWIN__)
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#pragma message "FPUGuard::FPUGuard() is not implemented"
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#elif PX_OSX
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mControlWords[0] = _mm_getcsr();
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// set default (disable exceptions: _MM_MASK_MASK) and FTZ (_MM_FLUSH_ZERO_ON), DAZ (_MM_DENORMALS_ZERO_ON: (1<<6))
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_mm_setcsr(_MM_MASK_MASK | _MM_FLUSH_ZERO_ON | (1 << 6));
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#elif defined(__EMSCRIPTEN__)
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// not supported
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#else
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PX_COMPILE_TIME_ASSERT(sizeof(fenv_t) <= sizeof(mControlWords));
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fegetenv(reinterpret_cast<fenv_t*>(mControlWords));
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fesetenv(FE_DFL_ENV);
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#if PX_LINUX
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// need to explicitly disable exceptions because fesetenv does not modify
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// the sse control word on 32bit linux (64bit is fine, but do it here just be sure)
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fedisableexcept(FE_ALL_EXCEPT);
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#endif
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#endif
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}
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physx::PxFPUGuard::~PxFPUGuard()
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{
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#if defined(__CYGWIN__)
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#pragma message "PxFPUGuard::~PxFPUGuard() is not implemented"
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#elif PX_OSX
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// restore control word and clear exception flags
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// (setting exception state flags cause exceptions on the first following fp operation)
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_mm_setcsr(mControlWords[0] & ~_MM_EXCEPT_MASK);
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#elif defined(__EMSCRIPTEN__)
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// not supported
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#else
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fesetenv(reinterpret_cast<fenv_t*>(mControlWords));
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#endif
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}
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PX_FOUNDATION_API void physx::PxEnableFPExceptions()
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{
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#if PX_LINUX && !defined(__EMSCRIPTEN__)
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feclearexcept(FE_ALL_EXCEPT);
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feenableexcept(FE_INVALID | FE_DIVBYZERO | FE_OVERFLOW);
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#elif PX_OSX
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// clear any pending exceptions
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// (setting exception state flags cause exceptions on the first following fp operation)
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uint32_t control = _mm_getcsr() & ~_MM_EXCEPT_MASK;
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// enable all fp exceptions except inexact and underflow (common, benign)
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// note: denorm has to be disabled as well because underflow can create denorms
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_mm_setcsr((control & ~_MM_MASK_MASK) | _MM_MASK_INEXACT | _MM_MASK_UNDERFLOW | _MM_MASK_DENORM);
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#endif
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}
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PX_FOUNDATION_API void physx::PxDisableFPExceptions()
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{
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#if PX_LINUX && !defined(__EMSCRIPTEN__)
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fedisableexcept(FE_ALL_EXCEPT);
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#elif PX_OSX
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// clear any pending exceptions
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// (setting exception state flags cause exceptions on the first following fp operation)
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uint32_t control = _mm_getcsr() & ~_MM_EXCEPT_MASK;
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_mm_setcsr(control | _MM_MASK_MASK);
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#endif
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}
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